First truly 3D chip fabbed at US foundry, features carbon nanotube transistors and RAM on a single die — future devices could have up to 1000x improvement in energy-delay product

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https://www.tomshardware.com/tech-industry/semiconductors/stanford-led-team-builds-3d-ai-chip-at-us-foundry-reports-4x-performance-gains

A collaborative research team has demonstrated what it says is the first monolithic 3D integrated circuit manufactured at a commercial U.S. foundry.

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Oh man, if this pans out this is huge. Like, next-level evolutions in both density and computing power. Lots of development work before its widespread if it is legit, but for a while it was looking like this was effectively impossible for the sub 30 processes so this is so kickass to see.

Sounds like HBM. Also often the bounding factor is heat, thus dark silicon.

I finally got a chance to read it and while it sounds similar, the above linked is a “true” 3D architecture - that being a monolithic piece manufactured as one unit, and with spectacularly higher vertical connection density than you get in HBM (which is basically a stack of 2D dies with bus connections between layers(oversimplifying)). The team is also working to get vertical oriented logic (!!) as a standard feature with this architecture, which just isn’t possible with HBM. There’s a lot of design aspects taken from HBM assembly it seems, but this is just a very different beast.



@Warl0k3 @Rekall_Incorporated I know, right? This is awesome (if true)! I have long thought that chips need to start building up, rather than try to get smaller. (Though ideally, get as small as physically possible within the laws of physics and then start building up from there.)

3d chips will suffer from the square-cube law, which 2d chips largely do not. That said, if efficiency improvements are made, as well, it could make for some exciting improvements.




puf piece. This is some graphene level BS.


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